JK
Career profile
Johnsy Kanjirapallil John
Logic Design Engineer | Microsoft AI accelerator hardware
Mountain View, California, United States
Career path.
MicrosoftSenior Logic Design Engineer - AI Silicon Engineering group
Oct 2024 - Present- Intellibank
Staff Design Engineer - PCIe protocol exerciser test cards - RTL design (FPGA/ASIC)
Jan 2022 - Oct 2024 - Northrop Grumman Information Systems
Staff Design Engineer (T5) - ASICs and cryogenic superconducting digital logic microarchitecture
Aug 2020 - Jan 2022 - Northrop Grumman Information Systems
Sr. Principal Design Engineer (T4) - cryogenic superconducting digital logic microarchitecture
Jul 2018 - Jul 2020 - Intellibank
Design Engineer - Pathfinding microarchitecture / RTL development of Custom Compute Accelerator
Jan 2017 - Jul 2018 - Exabolt
Software algorithm developer
Oct 2015 - Apr 2018 - AMD
Senior Design Engineer - CPU cores microarchitecture
Aug 2007 - Oct 2015 - Qualcomm
Logic Design Engineering Intern
Sep 2006 - May 2007 - Lucent Technologies Bell Labs innovations
Process Analyst / Photonic processor
Dec 1999 - Oct 2001