SB
Career profile
Sarala Bapatla
CPU Physical Design Timing Engineer, Intel
Bengaluru, Karnataka, India
Career path.
- Intellibank
CPU Physical Design Timing Engineer
Feb 2022 - Present - Intellibank
CPU Physical Design Engineer
Oct 2020 - Jan 2022 - Intellibank
Soc Design Engineer
Apr 2018 - Sep 2020 - Qualcomm
Senior Engineer
Apr 2016 - Mar 2018 - Soctronics
Senior Physical Design Engineer
Jul 2011 - Apr 2016