↔ transferPlayer cards ↗
People / Tejasvi Chakravarthy
TC
Career profile

Tejasvi Chakravarthy

AI/ML Silicon Engineering Leader | ASIC · SoC · Post-Silicon Debug | 25 Years @ Meta · Apple · Intel | Building Next-Gen Hardware at Scale

San Francisco Bay Area

Career path.

  1. Meta

    AI/ML accelerator ASIC Engineer

    Jan 2025 - Present
  2. Meta

    Hardware Systems Engineer

    Jul 2019 - Mar 2025
  3. Apple

    Silicon Validation Engineer

    Nov 2017 - Jul 2019
  4. Intellibank

    Software System Validation Architect (HPC)

    Sep 2015 - Nov 2017
  5. Intellibank

    Software System Validation Architect

    Sep 2015 - Nov 2017
  6. Intellibank

    Hardware Validation Architect

    Jan 2008 - Aug 2015
  7. Intellibank

    Hardware Validation Architect and Sr. Tech Lead

    Apr 2001 - Dec 2007
  8. Arrow Electronics

    Field Application Engineer

    Nov 1997 - Aug 1999